| LDR | | 00000nam u2200205 a 4500 |
| 001 | | 000000827457 |
| 005 | | 20200903112651 |
| 007 | | ta |
| 008 | | 191127s2018 nyu 001 0 eng d |
| 020 | | ▼a 9780134549897 (harkback) |
| 020 | | ▼a 0134549899 (harkback) |
| 040 | | ▼a 211043▼c 211043▼d 211043 |
| 082 | 04 | ▼a 621.381537▼2 22 |
| 090 | | ▼a 621.381537▼b M285d6 |
| 245 | 00 | ▼a Digital design :▼b with an introduction to the verilog HDL, VHDL, and system Verilog /▼c M. Morris Mano, Michael D. Ciletti. |
| 250 | | ▼a 6th ed. |
| 260 | | ▼a NY, NY :▼b Pearson,▼c 2018. |
| 300 | | ▼a xvi, 694 p. ;▼c 25 cm. |
| 500 | | ▼a Includes index. |
| 650 | 0 | ▼a Electronic digital computers▼x Circuits. |
| 650 | 0 | ▼a Logic circuits. |
| 650 | 0 | ▼a Logic design. |
| 650 | 0 | ▼a Digital integrated circuits. |
| 700 | 1 | ▼a Mano, M. Morris,▼d 1927- |
| 700 | 1 | ▼a Ciletti, Michael D. |